Note : Question one is compulsory. Answer any three from the rest.

1. (i) What are the design parameters for pipeline processors? Discuss them briefly with examples. 5
(ii) Discuss the structure of superscalar pipelines and the factors causing pipeline stalling. 8
(iii) Consider the execution of an object code with 2,00,000 instructions on a 40 MHz processor. The program consists of four major types of instructions. The instruction mix and the number of cycles (CPI) needed for each instruction type are given below based on the result of a program trace experiment :

Instruction type CPI Instruction Mix
Arithmetic and logic 1 60%
Load/store with catche hit 2 18%
Branch 4 12%
Memory reference with catche miss 8 10%

(a) Calculate the average CPI when the program is executed on a uniprocessor with above trace results.
(b) Calculate the corresponding MIPS rate based on the CPI obtained in part (a) [10]

(iv) What is the architectural distinction between RISC and CISC processors? Explain the concept of overlapping register windows in the SPARC architecture diagrammatically. [7]

2. (a) What are the two approaches to interleaved memory organization? What are its significance? Draw a complete eight-way high order interleaving diagram. Also explain what are the major and minor cycles for pipelined access and how are these two related. 8

(b) Design a four-way sector mapping catche organization and explain its functioning. How is it different from fully associative or set associative catche? [7]

3. Distinguish among the following: [15]
(i) SIMD (Single Instruction and Multiple Data) and
MIMD (Multiple Instruction and Multiple Data)

(ii) Instruction level and Loop level parallelism.
(iii) Binary tree and Fat tree interconnection architectures.
(iv) Write through catches and Write back catches.
(v) Hardware and Software parallelism.

4. Answer the following questions : [15]
(i) Why is synchronous pipeline selected over asynchronous pipeline?
(ii) Compare and contrast between shared and distributed memory.
(iii) Compare and contrast between message passing and address switching?
(iv) Explain the difference between superscalar and VLIW architectures in terms of H/W and S/W requirements.
(v) Main features of logic programming model.

5. Answer the following questions with respect to principles of multithreading and principles of scalable performance. [15]

(a) Discuss the four machine parameters to analyze the performance of multithreaded architecture.

(b) The four switching policies to differentiate multithreaded architectures.

(c) Discuss five challenging areas in supercomputer parallel processing application with computational tasks and expected results.

1. Explain in brief the following as applied to multiprocessors and multicomputers. [15]
a. A hierarichal catche/bus architecture for designing a scalable multiprocessor.
b. Network partitioning for multicast communication.
c. Discard and retransmission flow control.