1.(i) Draw a table showing performance factors versus system attributes and explain them.

(ii) A 50 MHz processor was used to execute a benchmark program with the following instruction and clock cycles counts.

Instruction type Instruction count Clock cycles count
Integer Arithmetic 45000 1
Data transfer 32000 2
Floating point 15000 2
Control transfer 8000 2

Determine the effective CPI, MIPS rate and execution time for this program.

(iii) What cause a processor pipeline to be underpipelined?

(iv) What are the factors limiting the degree of superscalar design?

(v) Illustrate a diagram showing asynchronous bus timing using a four edge handshaking (interlocking ) with variable length signals for different speed devices.

2.(i) Draw a comparison table of Control-flow, Data flow and Reduction computers explaining the following:
· Basic definition
· Advantages
· Disadvantages

(ii) Describe the important characteristics of static connection networks.

3(i) Provide several definitions of scalability. Sketch diagrams for scalability matrices and programmability vs scalability and explain them in detail.

(ii) What are tradeoffs in scalability analysis?

4.(i) Explain the following terms associated with cache design
· Write through Vs Write-back catches
· Cacheable Vs Non-cacheable data
· Private catch Vs Shared cache
· Cache flushing policies

(ii) With each cache organization explain the effects of block mapping policies on the hit ratio issues.

5. Discuss the following with proper examples and illustrations as applied to superscalar pipeline design:
· Superpipeline structure
· Data dependence
· Pipeline stalling

6. Explain the following terms associated with Multiprocessors and Multi computers:

· Buffer deadlock vs Channel deadlock
· Buffer flow control using virtual cut-through routing
· Blocking flow control in wormhole routing
· Network communication latency
· Network partitioning for multicasting communications